Senior Software Engineer II at North Atlantic Industries
Leadership & Product Ownership
- Led development of a custom bootloader, delivered as a DO-178C product and deployed across all of the company's ARM products, with features including field firmware updates, multiple boot partitions, startup Built-In Test (SBIT), and FPGA programming, with signature and integrity verification of update images (CRC and hashing) and a hardware root of trust with secure boot on Zynq UltraScale+. Worked with the hardware team to enable and integrate Xilinx SEM IP for single-event-upset detection and correction in the FPGA fabric. DDR-less module builds ran with no external DRAM at all, executing out of the Cortex-A9's L2 cache configured as RAM.
- Led design and development of a modular multi-function I/O framework spanning multiple hardware and software architectures, architected from the ground up for DO-178C artifact reuse. Roughly 30 module families share one certified core through function-pointer dispatch, so a new module is a table of lifecycle functions rather than a new program.
- Led development of the 75PS4, NAI's 3U cPCI DC/DC converter and a standard catalog product: took it over at Rev B and drove it to Rev R over 12+ years of improvements, new features, and part obsolescence, owning all of the device firmware in C and writing a C++/Qt PC application to configure and monitor it, while directing the electrical and mechanical specialists through routing, mechanical, qualification and environmental testing changes, and coordinating with vendors and customers. Wrote the product's USB support from scratch in bare metal: custom drivers and a protocol stack implementing the CDC device class, used for factory bring-up, factory and end-user configuration, monitoring and control, and firmware updates. The product used a multi-MCU, CPU, and FPGA architecture, requiring inter-chip communication across isolation barriers.
- Led development of a 6U VME relay motherboard, built on a Xilinx Zynq-7015 SoC with multiple Altera MAX CPLDs and used as both an internal test tool and a fielded product, handling schematic and layout review, initial board bring-up, FPGA (VHDL) and CPLD logic design, the bootloader, and the RTOS and Linux software.
- Technical lead on many cross-team efforts in a matrixed organization. Mentored and onboarded many engineers and interns, reviewed hundreds of candidate resumes, and personally interviewed dozens of engineers, both technical and fit.
- Built hardware and software that was installed and flown on aircraft, and supported customer flight programs through integration and certification.
Firmware, Drivers & Board Bring-Up
- Delivered firmware and drivers across NAI's C3/C5, G5, and G6 multifunction I/O motherboards, modern single-board-computer (SBC) line, and CIU/NIU rugged integrated systems: 30+ board and system designs spanning 3U/6U OpenVPX, cPCI, VME, and PCIe, hosting 100+ configurable smart function modules.
- Took new hardware platforms through initial bring-up, integration, troubleshooting, and functional prototype development, bringing up many new board designs from power-on and writing low-level bootstrapping code and bootloaders (including U-Boot) and drivers across NXP/Freescale QorIQ PowerPC (T2080/e6500 and P2041/e500mc), NXP Layerscape LX2 (Cortex-A72), Intel Core i7 (11th Gen, Tiger Lake) and Xeon W, and Xilinx Zynq-7000 and Zynq UltraScale+ SoCs, along with a range of NXP/Freescale, STMicroelectronics, Xilinx, and Altera microcontrollers, FPGAs, and CPLDs.
- Created and owned NAIBSP, the company's multi-architecture board support package: a hardware abstraction layer, drivers, and a common application API spanning ARM, PowerPC and Intel instruction sets and every operating system in the stack. One source base builds as kernel-level drivers, user-level drivers, user-level driver clients, or the application API, selected by compile-time configuration and per-target porting layers, which let kernel and driver code be shared across operating systems that had each behaved differently. Carried through the DO-178C process to DAL A on multiple projects, shipped on every board and module the company made, used by the whole engineering staff and by customers directly. Held architectural authority over it and approved every change. Built from 2018 and still in production use.
- Developed the CIU (COSA Integration Unit) low-level software across its Arm Cortex-A53 and Cortex-R5 cores, including the A53 bootloader and bare-metal environment, the R5 BSP, memory-windowing and lock-windowing logic, and a multifunction bare-metal AMP split distributing I/O module functions across two R5 cores, and profiled and optimized boot time and runtime performance. Built bootloaders, bare-metal code, and hardware to low-power requirements, with power optimization at both the firmware and board level.
- Brought up multi-OS support on the 68INT6 SBC across DDC-I Deos (including 64-bit), Linux, VxWorks 7, and Wind River HVP, writing UART drivers and Ethernet PHY bring-up code, plus a bare-metal diagnostic system and Windows drivers.
- Developed firmware and drivers for 35+ smart I/O and measurement function module families (100+ variants), spanning analog (A/D, D/A), isolated and non-isolated discrete I/O (GPIO, TTL, PWM), relays, synchro/resolver, LVDT/RVDT, RTD/thermocouple, strain gauge, inertial (accelerometer, gyro, IMU), encoder, variable reluctance, chip detector/fuzz burn, camera/vision, and time-of-flight sensor interfaces.
- Developed communications interfaces and drivers across ARINC 429, MIL-STD-1553, CAN, Ethernet, and serial (RS-422/485) protocols.
- As an intern (2012), built LabVIEW and LabVIEW-RT driver interfaces to the company's I/O hardware and supported customer applications built on them; that work led directly to a full-time offer from the CEO.
- Implemented Built-In Test across startup, background and continuous modes, and authored the Startup BIT library: a self-test framework covering eleven board subsystems, scoped separately at host, module and platform level. Memory is tested as three distinct passes over the address bus, the data bus and the device; flash validates both partition and manifest descriptors and that partitions load; the timer and watchdog tests install interrupt handlers and verify the interrupt actually fires. Every test emits a uniform result record identifying which sub-test failed.
- Took ownership of and maintained NAISTDLIB, the company's DO-178C DAL A standard C library: the ANSI C surface plus a separate math library, with a binding layer to the DDC-I Deos API.
- Delivered ARINC 653 time-and-space partitioned avionics builds on VxWorks 653 and DDC-I Deos 653, alongside RTEMS, VxWorks Cert Edition and Wind River Helix Virtualization Platform targets.
- Designed and built the company's Windows kernel-mode drivers: KMDF and WDM function drivers for PCI and PCIe devices, working in Windows internals and debugging with WinDbg, and signed production release drivers with Authenticode under an EV code-signing certificate.
- Worked both sides of the PCI and PCIe link: endpoint and device drivers as Linux kernel drivers and as Windows KMDF and WDM function drivers for the same hardware, and PCI/PCIe root port development across RTOS, Linux and bare-metal environments, handling INTx, MSI and MSI-X interrupt modes, memory-mapped I/O, and DMA.
- Worked with TCP/IP and UDP at the sockets and application-protocol level on Windows and embedded Linux, and integrated the lwIP stack on bare-metal targets against the Ethernet driver and PHY reset and bring-up code written for the same boards.
- Wrote block device and storage drivers and debugged SATA and NVMe problems on NXP Linux, working down through the full Linux SATA stack and into NVMe device firmware; handled the flash and boot-storage side (NAND and NOR, MTD, wear leveling) behind the bootloader and firmware-update path.
- Debugged kernel-level problems on target with JTAG and hardware debuggers, root-caused kernel oops and panics from dumps and stack traces, and instrumented through printk, dmesg, procfs and sysfs.
Verification, Test & Process
- Engaged directly with DERs, auditors and customer certification teams on DO-178C certification, rather than producing evidence for others to present.
- Performed schematic and board layout reviews and validated and debugged boards on the bench with JTAG, oscilloscopes, multimeters, spectrum analyzers, and logic analyzers, diagnosing hardware/software integration problems and driving root cause analysis to closure; built automated ATP and DVT test tooling in C#.
- Ran and supported qualification and environmental testing of ruggedized products, personally running some of the EMI, vibration and environmental testing, including MIL-STD-461 EMI and conducted emissions, temperature, vibration, shock, humidity and lightning testing, plus environmental stress screening, under size, weight and power constraints.
- Managed software configuration at project and program level: release control, baselines, program-level branching and release sign-off. Drove design changes through the formal engineering change order process, supported by acceptance and design verification testing.
- Practiced Agile software development (standups, estimating, prioritization, retrospectives), participated in code and design reviews, and drove defect analysis and resolution to closure while improving team software processes.
- Researched thermal management options and made recommendations to the design team; machined housing and heatsink modifications for development and prototype units; worked with the machinist, 3D scans, and the CAD team on fit and clearance.
- Authored and maintained the company's software coding standards, including the controlled DO-178C Software Code Standard, and owned the tooling that enforced them: the PC-Lint static-analysis configuration and shared formatter settings. Set up, ran and interpreted MC/DC structural code coverage and worst-case execution time analysis.
- Developed and documented software to the DO-178C (DAL A) safety-critical avionics standard, authoring software requirements and deriving requirements-based test cases from them; helped stand up the company's DO-254 hardware design-assurance process, securing the resources it needed to begin and sitting in on the decisions.
- Handled ITAR-controlled and Controlled Unclassified Information (CUI) technical data in accordance with export-control and data-handling requirements.
- Ran human-in-the-loop testing with operators: sat with the people using the software and interfaces delivered to them and fed observations back into the design, and drove hardware-in-the-loop and simulator rigs with a person running the scenario rather than an automated script.
- Validated kernel and operating-system releases before they shipped, and built multi-unit hardware test setups to do it.
- Ran Proxmox VE (KVM/QEMU and LXC) as a primary development machine, managing virtual machine and container lifecycle, storage, bridged networking and GPU passthrough as a daily working environment.